Awesome, thank you @Clams. Now I’m getting it.
Here’s my summary:
There’s not really a deep law of physics which says there has to be a 1:1 ratio between the chip rate and the bandwidth, rather it’s done for simplicity and practicality.
The chip rate being equal to the bandwidth (e.g., 125 kHz bandwidth gives 125,000 chips/sec), serves as a stable reference/anchor point. By tuning the spreading factor, you can balance data rate and signal robustness. In other words, the technical constraints of the ratio can easily be overcome.
As mentioned earlier, by maintaining a 1:1 ratio, if you halve the transmit time per chip, you double the frequency spacing, allowing each chip’s frequency to remain distinguishable at the same resolution (ratio of transmit time to frequency spacing remains the same).
Values like 125,000 or 250,000 chips/sec align well with typical PLL (phase lock loop) systems and filtering capabilities, helping avoid excessive out-of-band emissions or hardware complexity.
It keeps the maths simple.